ARM7 & ARM9分有2個Hardware breakpoint (called "watchpoint units" in ARM's documentation), Hardware breakpoint不需要修改code, 但是Software breakpoint則不同, debugger會更改breakpoint所在的指令, 填一入特定的值. 如此便沒有breakpoint數量的限制, 但唯一的限制就是Code是必須run在RAM才行。
但是如果沒有External RAM的話, 還有其它辦法可以解決Breakpoint不足的問題.
請參考(C:\Program Files\SEGGER\JLinkARM_V374i\Doc\Manuals\JLinkRDI.pdf).
Saturday, October 6, 2007
J-Link Usage
J-Link Introduction
IAR的J-Link就是Segger作的.
J-Link Utility Download
JLinkARM.dll
要檢查目前IAR所使用的版本是不是較新的.
J-Mem.exe
CPU run起來後, 可透過它更改memory的資料.
JLinkRDI
由於ARM core本身只有兩個Hardware breakpoint, 如果需要更多的Breakpoint就可以使用RDI, IAR project->option->RDI.
PS. RDI: Remote Debug Interface
Q: Manual(C:\Program Files\SEGGER\JLinkARM_V374i\Doc\Manuals\JLinkRDI.pdf)上有講到, Download into Flash without the need for a Flash loader. What's that mean?
JLinkTCPIPServer.exe
跟ARM Multi-ICE一樣可透過TCP/IP使用J-Link/J-Trace
Reference:
JLinkARM.pdf, 該文件中有介紹在一台PC上同時使用兩個以上的ICE (J-Trace/J-Link). 依照該文件的設定無法使用。使用jlinkarm.dll版本為:3.56.6.0便可行。
IAR的J-Link就是Segger作的.
J-Link Utility Download
JLinkARM.dll
要檢查目前IAR所使用的版本是不是較新的.
J-Mem.exe
CPU run起來後, 可透過它更改memory的資料.
JLinkRDI
由於ARM core本身只有兩個Hardware breakpoint, 如果需要更多的Breakpoint就可以使用RDI, IAR project->option->RDI.
PS. RDI: Remote Debug Interface
Q: Manual(C:\Program Files\SEGGER\JLinkARM_V374i\Doc\Manuals\JLinkRDI.pdf)上有講到, Download into Flash without the need for a Flash loader. What's that mean?
JLinkTCPIPServer.exe
跟ARM Multi-ICE一樣可透過TCP/IP使用J-Link/J-Trace
Reference:
JLinkARM.pdf, 該文件中有介紹在一台PC上同時使用兩個以上的ICE (J-Trace/J-Link). 依照該文件的設定無法使用。使用jlinkarm.dll版本為:3.56.6.0便可行。
Sunday, September 16, 2007
Ymodem TX
Ymodem reference I
Ymodem reference II
ftp://ftp.simtel.net/pub/simtelnet/msdos/turbopas/htmlswag10.zip
Ymodem reference II
ftp://ftp.simtel.net/pub/simtelnet/msdos/turbopas/htmlswag10.zip
COMM/0084.PAS
Reference I--------------------------------------------
Sender Receiver
C
C
SOH 00 FF Y/Zmodem Header[128] crchi crclo
ACK
C
STX 01 FE data[1024] crchi crclo
ACK
STX 02 FD data[1024] crchi crclo
NAK
STX 02 FD data[1024] crchi crclo
ACK
STX 03 FC data[1024] crchi crclo
ACK
STX 04 FB data[1024] crchi crclo
ACK
EOT
NAK
EOT
ACK
C
SOH 00 FF NUL[128]
---------------------------------------------------------
Reference II--------------------------------------------
Sender Receiver
C
C
SOH 00 FF Y/Zmodem Header[128] crchi crclo
ACK
C
STX 01 FE data[1024] crchi crclo
ACK
STX 02 FD data[1024] crchi crclo
NAK
STX 02 FD data[1024] crchi crclo
ACK
STX 03 FC data[1024] crchi crclo
ACK
STX 04 FB data[1024] crchi crclo
ACK
EOT
ACK
C
SOH 00 FF NUL[128]
---------------------------------------------------------
在Reference I所定義的Ymodem和Reference II所定義的有點不相同.
若使用Windows, hyper terminal接收檔案,傳送端必須使用Reference II.
Thursday, September 13, 2007
ARM_init.s
修改FMI module, 修改
開機區、非開機區的Flash size, 起啟位置, 終止位置
系統若有Bootloader則不需執行這些initial code.
; --- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000,
; when the bank 0 is the boot bank, then enable the Bank 1.
LDR R6, =0x54000000 ; BOOT BANK Size = 512KB
LDR R7, =0x4 ; (2^4) * 32 = 512KB
STR R7, [R6]
LDR R6, =0x54000004 ; NON BOOT BANK Size = 32KB
LDR R7, =0x2 ; (2^2) * 8 = 32KB
STR R7, [R6]
LDR R6, =0x5400000C ; BOOT BANK Address = 0x0
LDR R7, =0x0
STR R7, [R6]
LDR R6, =0x54000010 ; NON BOOT BANK Address = 0x80000
LDR R7, =0x20000 ; need to put 0x20000 because FMI bus on A[25:2] of CPU bus
STR R7, [R6]
LDR R6, =0x54000018 ; Enable CS on both banks
LDR R7, =0x18
STR R7, [R6]
開機區、非開機區的Flash size, 起啟位置, 終止位置
系統若有Bootloader則不需執行這些initial code.
; --- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000,
; when the bank 0 is the boot bank, then enable the Bank 1.
LDR R6, =0x54000000 ; BOOT BANK Size = 512KB
LDR R7, =0x4 ; (2^4) * 32 = 512KB
STR R7, [R6]
LDR R6, =0x54000004 ; NON BOOT BANK Size = 32KB
LDR R7, =0x2 ; (2^2) * 8 = 32KB
STR R7, [R6]
LDR R6, =0x5400000C ; BOOT BANK Address = 0x0
LDR R7, =0x0
STR R7, [R6]
LDR R6, =0x54000010 ; NON BOOT BANK Address = 0x80000
LDR R7, =0x20000 ; need to put 0x20000 because FMI bus on A[25:2] of CPU bus
STR R7, [R6]
LDR R6, =0x54000018 ; Enable CS on both banks
LDR R7, =0x18
STR R7, [R6]
Tuesday, September 11, 2007
IAR library building
XAR Library builder: Combine a set of UBROF object files into a library file.
XLIB librarian: can do a number of things in addition to building libraries: modify the size and contents of existing libraries, list information about individual library modules, and more.
--> Both tools use the UBROF standard object format(Universal Binary Relocatable Object Format).
XLIB功能多於XAR, 若只是單純的把數個Object file(UBROF)作成一Library, XAR便已足夠了。
XLIB librarian: can do a number of things in addition to building libraries: modify the size and contents of existing libraries, list information about individual library modules, and more.
--> Both tools use the UBROF standard object format(Universal Binary Relocatable Object Format).
XLIB功能多於XAR, 若只是單純的把數個Object file(UBROF)作成一Library, XAR便已足夠了。
IAR File Type
Reference: EWARM_UserGuide.pdf
.d79: Target application with debug information, output from: XLINK
.i: Preprocessed source, output from: compiler
.i79: ARM chip settings, input to IAR embedded workbench
.lst: List output, output fromL XLINK
.r79: Object module
.xcl: Extended command line
.mac: C-SPY macro definition, input to: C-SPY
.ewd: Project setting for C-SPY, output from:IAR Embedded Workbench
.ewp: IAR Embedded workbench project
.eww: Workspace file
.d79: Target application with debug information, output from: XLINK
.i: Preprocessed source, output from: compiler
.i79: ARM chip settings, input to IAR embedded workbench
.lst: List output, output fromL XLINK
.r79: Object module
.xcl: Extended command line
.mac: C-SPY macro definition, input to: C-SPY
.ewd: Project setting for C-SPY, output from:IAR Embedded Workbench
.ewp: IAR Embedded workbench project
.eww: Workspace file
Sunday, July 29, 2007
eCos
eCos is an open source, royalty-free, real-time operating system intended for embedded applications.
Introduction to eCos
Reference book: Embedded Software Development with eCos
Introduction to eCos
Reference book: Embedded Software Development with eCos
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